updated 02:15 pm EST, Wed November 28, 2007
Rambus Terabyte Initiative
Memory maker Rambus today unveiled its Terabyte Bandwidth Initiative, a new effort to cross a symbolic barrier for computer memory speed. The plan will see a new form of RAM that can pass 32 bits of data in one clock cycle versus the two bits of today's memory and splits the signaling between data and commands or memory addressing. The net effect is to provide 16 gigabits per second of bandwidth with a single 500MHz memory chip -- about 16 times the performance of today's DDR2 memory standard at the same clock rate.
This should scale upwards with future designs, Rambus says. When connected to a system-on-a-chip architecture, multiple chip arrays could bond together to achieve the namesake terabyte of data per second. This should easily exceed the bandwidth from even the best systems using Rambus' own 4.8GHz XDR memory technology. Even a memory-intensive device such as a high-end video card uses no more than 128 gigabytes of memory per second, according to the company.
No precise window for the launch of 1TB/second memory is available, but Rambus fully expects to see the speed appear in production memory by the time the next generation of video game consoles and intends to roll out the technology for computers, graphics cards, and home electronics before that time.