updated 06:50 am EDT, Thu May 29, 2008
Isiah-based Nano chips
On the heels of its C7-based OpenBook reference design, VIA Technologies on Thursday formally introduced its VIA Nano processor family based on the "Isaiah" architecture. VIA claims that the Nano family, which uses Fujitsu's 65 nanometer process, offers as much as four times the performance of its previous-generation within the same power and thermal envelope, while offering pin-compatibility with VIA C7 processors. Introduced in January, the new low-power CPU features out-of-order processing, a large 1MB L2 cache, and an improved FPU for 2-4 times the performance of the previous-generation C7 processor at the same clock speeds. While already sampling the chips to vendors, VIA says expects to ship the low-power (L-series) and ultra-low-power (U-series) Nano chips in the third quarter in speeds up to 1.8GHz.
VIA's next-generation chips feature a 64-bit, superscalar, Out-Of-Order microArchitecture for improved performance. Stepping up performance, the out-of-order architecture offers more complexity than the in-order-architecture of the C7 (and also Intel's Atom); Out-Of-Order processing allows the processor to re-prioritize the original sequential instruction set order, enabling other instructions to bypass stalled or problem executions -- keeping the processor fully utilized until all of the instructions are executed (the instructions are subsequently re-ordered per incoming programmer's instructions).
Other features of the Nano chips include the low-power VIA V4 Front Side Bus starting at 800MHz; two 128-bit vector/floating-point "media units", support for new SSE instructions for improved multimedia performance, two 64KB L1 caches (twice as large as its competitors), and on-chip hardware cryptographic acceleration and security features, including dual quantum random number generators, an AES Encryption Engine, NX execute protection, and SHA-1 and SHA-256 hashing.
The company said it chose to optimize the new chips around the 1.0-1.2GHz range to deliver more performance within the same power and thermal envelopes and that improvements to the FPU algorithms and a larger 1MB L2 cache, will help it outperform similar-wattage Intel Atom chips, especially in multimedia and FPU tasks (although comparative benchmarks are not available).
The chips also offers advanced power management features with aggressive management of active power, support for the new "C6" power state, Adaptive PowerSaver Technology, and new circuit techniques and mechanisms for managing the die temperature to reduce power draw and improve thermal management. In addition, the compact 21mm x 21mm nanoBGA2 package offers an idle power as low as 100mW (0.1W), enabling a broader range of power efficient green and silent PCs, thin and light notebooks and mini-notes.
The Nano family will be launched in two models: the VIA Nano L-series processors for mainstream desktop and mobile PC systems, and the ultra low voltage U-series for small form factor desktop and ultra mobile devices such as the HP Mini-Note.