updated 01:55 am EST, Wed December 31, 2008
New Via Nano chips coming
Chip manufacturer VIA will begin sampling a dual-core version of its Nano CPU in the second half of 2009 and shipping the next-generation processor in volume in late 2009 or early 2010, slightly earlier than previous a roadmap leak indicated. Like rival AMD which recently outlined new Atom-competitors, VIA's X86-compatible Nano chips debuted in May to compete with Intel's Atom and lower-end Celeron M chips. VIA hopes to stem the growing adoption of Intel's Atom processor (and dual-core nettop PC variant); VIA, the report says, expects to deliver samples ahead of the previously reported June 2010 launch. Digitimes reports that the new dual-core Nano chips will arrive before the end of the first quarter of 2010, while a next-generation SSE4-enabled Nano CPU will arrive in the third quarter of 2009.
Based on the Nano 1000 and 2000 series chips, the report says that VIA plans to launch the next-generation Nano 3000 series CPU in the third quarter of 2009 with support for the SSE4 instruction set. The SSE4 instructions were introduced as part of the Intel Core microarchitecture, but also have been licensed by rival AMD in its K10 architecture; the include more than 50 extra instructions to help boost performance for multimedia and web applications. Though it is unclear, the updated chips will likely not support the full SSE4 instruction set, but rather a subset of 47 instructions -- dubbed SSE4.1 -- which is available in Intel's Penryn (the seven remaining instructions are also available in Intel's new Core i7, formerly Nehalem).
According to the report, engineering samples of Nano 3000 series CPUs will be completed in the first quarter next year and the CPU will be manufactured using Fujitsu Electronics' 65nm process. VIA is still evaluating whether to manufacture the dual-core Nano chip using Fujitsu's 45nm process or Taiwan Semiconductor Manufacturing Company's (TSMC's) 40nm process, Digitimes reported.
VIA is currently expected to release its Nano E-series chip in the spring of 2009, which will bump up the front system bus speeds from the current 800MHz to 1,333MHz and use a 65nm process. The chip will be backwards compatible and fit onto the same mainboards as the older NanoBGA2 chips.