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Intel provides early 32nm processor details

updated 03:15 pm EST, Tue February 10, 2009

Intel Westmere Details

Intel at the International Solid-State Circuits Conference today provided some of the first concrete details of Westmere, the codename for its 32 nanometer processor family. The design is primarily a smaller, more efficient adaptation of the Nehalem architecture in the Core i7 but, in the dual-core desktop (Clarkdale) and notebook (Arrandale) offerings, will include both a two-channel DDR3 memory interface and an integrated but switchable graphics core. Like NVIDIA's Hybrid SLI mode or AMD's Hybrid CrossFire, the technology will let systems with dedicated graphics chipsets revert to Intel's own core in low-demand situations or when on battery.

The top mainstream desktop variant, Gulftown, will also be the first non-Xeon chip from Intel to support six cores and, thanks to Hyperthreading, can run as many as 12 program threads at once. New to Westmere, however, is support for Hyperthreading during virtualization that would let VMware or similar virtual environments see two cores per processor. An AES instruction set has been added to specifically accelerate decrypting and encrypting data.

Intel plans for the bulk of the Westmere generation processors to ship in the fall of this year. Xeons will also be updated to Westmere but haven't been given details at the ISSCC event and aren't slated until early 2010.

Before Westmere, Intel still plans to finish launching processors using the Nehalem architecture on its original 45nm process, including quad-core Lynnfield desktop processors for mainstream and entry server/workstation systems, Bloomfield for the high-end mainstream, and both dual- and quad-core Clarksfield mobile processors. Xeon processors that support two sockets, Nehalem-EP, will be available with up to four cores, while Nehalem-EX Xeons will carry as many as eight cores.

Most of these processors will ship over the course of the spring and fall and may be led by Xeon introductions in late March.



By Electronista Staff
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