Toshiba to ship 32nm NAND Flash in fall, 2Xnm by '11
updated 05:40 pm EST, Tue February 24, 2009
Toshiba 32nm flash in fall
Toshiba has shown a 300mm wafer with 32nm, 32-gigabit (4GB) NAND flash memory chips at the recent International Nanotechnology Exhibition & Conference. The flash memory chips are based on 3-bit per cell technology that lets the company produce store much more data in a similar amount of space. Despite this, Toshiba notes it didn't make any significant changes from its earlier 43nm wafers, which used a similar floating gate structure to manage the flow of power.
To deal with an extremely small write margin that comes as a result of dividing the threshold voltage in eight, Toshiba says it had to make a major improvement to the circuit, but failed to comment further.
At the same time, Toshiba has mentioned that memory in the 20-30 nanometer range will be produced from late 2010 or 2011. It is determining whether or not a floating gate structure can still be applied or if it will need to shift to a new nitride trap to achieve the same effect. Many believe floating gates are at their limit in 3Xnm nodes due to inter-cell interference, among others. Due to the production schedule, the decision regarding which technology will be used is expected to be made fairly soon.
Volume production of 32nm memory is expected in September, with actual products following later.
