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Samsung debuts 3D vertical NAND flash tech, boosts density, speed

updated 05:28 am EDT, Tue August 6, 2013

Samsung 3D flash tech set to spur next-gen smartphone, tablet design

Samsung has debuted the industry's first 3D vertical NAND flash memory architecture. Just as Intel has pushed processor technology with its 3D tri-gate architecture first seen on its 'Ivy Bridge' designs, Samsung's engineers have taken a vertical to boost performance applying a similar principle to the way it designs its next-generation NAND flash designs. According to Samsung, its new design overcomes inherent technical challenges that arise when moving to 10nm processes including cell-to-cell interference while breaking through scaling limitations.

Samsung says that its V-NAND shows an increase in both speed and reliability and is between 2x and 10x faster with twice the write performance over its previous 10nm floating gate planar NAND flash. Using the new process, the company can stack as many as 24 cell layers vertically using a new etching technology that connects the layers electronically by punching holes from the highest layer to the bottom.

This translates into NAND flash that has much higher densities, meaning significantly improved performance and less space required for the same amounts of flash storage, or more storage in the same amount of space. Samsung's V-NAND offers 128Gb (16GB) memory density in a single chip, meaning that it is twice as scalable as its 20nm planar NAND flash designs that will help to spur the next generation of smartphone and tablet innovations.

Samsung says that it has commenced mass production of the new memory modules which it also adds is the result of 10 years research and includes over 300 patents being filed on its new 3D memory technologies.



By Electronista Staff
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