
<?xml version="1.0" encoding="ISO-8859-1"?>
<rss version="2.0">
<channel>
<title>electronista | Westmere News</title>
<link>http://www.electronista.com/</link>
<description>electronista is the leading source for electronic news. It offers news, reviews, discussion, tips, troubleshooting, links, and reviews every day. The best place for gadgets News. Period.</description>
<language>en-us</language>
<image>
<title>Westmere, Latest News, Headlines, Stories;</title>
<url>http://photos.macnn.com/logo-electronista.jpg</url>
<link>http://www.electronista.com/</link>
</image>
<item>
<title>Intel unveils 10-core, heavy duty Xeon E7</title>
<link>http://www.electronista.com/articles/11/04/05/intel.xeon.e7.packs.10.cores/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/1104/intelxeone7.jpg' border='0' width='176' height='120' /><![CDATA[Intel on Tuesday brought out the Sandy Bridge-based version of its highest-performing Xeons.  The Xeon E7 series is the practical version of the Westmere-EX architecture and is intended for both servers as well as other very high performance computers.  It represents one of the few if not first Intel chips to break the eight-core barrier and, at 10 real cores, can handle as many as 20 simultaneous...]]></description>
<guid>http://www.electronista.com/articles/11/04/05/intel.xeon.e7.packs.10.cores/</guid>
<pubDate>Tue, 05 Apr 2011 18:25:00 GMT</pubDate>
</item>
<item>
<title>Intel's Westmere-EX Xeon chip may top out at 10 cores</title>
<link>http://www.electronista.com/articles/10/06/21/intel.westmere.ex.may.scale.back.ambitions/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/1006/intelxeon7500.jpg' border='0' width='176' height='120' /><![CDATA[Intel might scale back its plans for Xeon processors using its Westmere-EX architecture, a rumor may have confirmed today.  Originally thought to have as many as 12 cores, a source now says it would peak at 10.  What caused this wasn't mentioned by the PCWorld contact, but heat, power and size requirements are often what set back chip releases....]]></description>
<guid>http://www.electronista.com/articles/10/06/21/intel.westmere.ex.may.scale.back.ambitions/</guid>
<pubDate>Mon, 21 Jun 2010 22:50:00 GMT</pubDate>
</item>
<item>
<title>Intel's Westmere-EX to bring 12 cores, 32nm to servers</title>
<link>http://www.electronista.com/articles/10/05/07/intel.westmere.ex.to.replace.nehalem.in.large.pcs/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/1005/intelxeon7500-2.jpg' border='0' width='176' height='120' /><![CDATA[Intel is planning a server-oriented version of its 32 nanometer Xeons that would be the company's first chip of any kind with more than eight cores, Intel said in a webcast late Thursday.  Currently codenamed Westmere-EX, it would supplant the eight-core, 45nm Xeon 7500 and is likely to pack 12 cores without increasing the power consumption over the current chip.  It should still work in existing ...]]></description>
<guid>http://www.electronista.com/articles/10/05/07/intel.westmere.ex.to.replace.nehalem.in.large.pcs/</guid>
<pubDate>Fri, 07 May 2010 12:20:00 GMT</pubDate>
</item>
<item>
<title>Intel: eight-core and 32nm Xeons on track for March</title>
<link>http://www.electronista.com/articles/10/03/05/intel.nehalem.ex.due.for.servers/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/1003/intelwestmere.jpg' border='0' width='176' height='120' /><![CDATA[Intel in an update late Thursday said its next-generation Xeon processors should still launch later this month.  The eight-core Nehalem-EX processors don't have official clock speeds but will include 24MB of cache shared between each of the individual cores and will support Hyperthreading.  A server with four Xeons could as a result support as many as 64 separate program threads at once, Xeon plat...]]></description>
<guid>http://www.electronista.com/articles/10/03/05/intel.nehalem.ex.due.for.servers/</guid>
<pubDate>Fri, 05 Mar 2010 22:45:00 GMT</pubDate>
</item>
<item>
<title>Intel's Huron River notebook platform due early 2011</title>
<link>http://www.electronista.com/articles/10/02/12/huron.river.to.replace.calpella.next.year/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/1002/intelcorei5mobile.jpg' border='0' width='176' height='120' /><![CDATA[Early details have surfaced of the timetable and features of Intel's replacement for Calpella, the chipset that drives mobile Core i3, i5 and i7 processors.  Already known under its Huron River codename, the new platform is now expected in early 2011.  It will still be built on a 32 nanometer process but will recognize processors built on the Sandy Bridge architecture, which should have both much ...]]></description>
<guid>http://www.electronista.com/articles/10/02/12/huron.river.to.replace.calpella.next.year/</guid>
<pubDate>Fri, 12 Feb 2010 12:55:00 GMT</pubDate>
</item>
<item>
<title>Intel ships mobile Core i5, i3 to PC builders</title>
<link>http://www.electronista.com/articles/09/12/17/intel.to.expand.nehalem.at.ces.2010/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/0912/intelcorei5mobile.jpg' border='0' width='176' height='120' /><![CDATA[Intel this afternoon revealed that it has already started shipping the processors it plans to unveil at CES.  Highlighted in the pack are its mobile Core i3 and i5 processors: the first notebook chips based on its year-old Nehalem architecture, the dual-core parts are not only faster than the outgoing Core 2 Duo at a given clock speed but are also the first Intel chips of any kind to integrate the...]]></description>
<guid>http://www.electronista.com/articles/09/12/17/intel.to.expand.nehalem.at.ces.2010/</guid>
<pubDate>Thu, 17 Dec 2009 22:00:00 GMT</pubDate>
</item>
<item>
<title>Intel readying six-core, 3.33GHz Core i7</title>
<link>http://www.electronista.com/articles/09/12/15/core.i7.980x.hints.at.6.core.xeon.too/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/0912/intelcorei9-leak.jpg' border='0' width='176' height='120' /><![CDATA[Intel's first mainstream six-core processor should be fast across the board, a leak late Monday has given away.  Built on the 32 nanometer Westmere process and part of the Gulftown architecture, the Core i7-980X will keep the Core i7 badge despite its two extra cores.  At the same time, it will also maintain a high clock speed and should run at 3.33GHz, or the same speed as the current quad-core l...]]></description>
<guid>http://www.electronista.com/articles/09/12/15/core.i7.980x.hints.at.6.core.xeon.too/</guid>
<pubDate>Tue, 15 Dec 2009 20:20:00 GMT</pubDate>
</item>
<item>
<title>Intel to preview mobile Core i5, more on Thursday</title>
<link>http://www.electronista.com/articles/09/12/14/intel.showing.32nm.chips.early/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/0912/intelwestmere.jpg' border='0' width='176' height='120' /><![CDATA[Intel has signaled its plans to detail the first processors based on its 32 nanometer Westmere technology on Thursday.  The semiconductor firm is expected to center its attention on the first dual-core notebook chips based on both the 32nm process and Nehalem and should introduce the mobile Core i5 and i3 as part of the introduction.  These will be the first to carry graphics on the processor die ...]]></description>
<guid>http://www.electronista.com/articles/09/12/14/intel.showing.32nm.chips.early/</guid>
<pubDate>Mon, 14 Dec 2009 16:15:00 GMT</pubDate>
</item>
<item>
<title>Intel's dual-core mobile Core i5, i7 priced in leak</title>
<link>http://www.electronista.com/articles/09/12/01/intel.set.to.show.3.mobile.core.ix.chips.in.jan/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/0911/intelwestmere.jpg' border='0' width='176' height='120' /><![CDATA[A leak today reveals that at least three of Intel's mobile Core i5 and i7 parts should be available come the start of next year at moderate prices.  The company plans to head up the line with the 2.66GHz Core i7-620M, which will support Hyperthreading to perform the work of four cores.  It should carry 4MB of Level 2 cache, support Turbo Boost up to 3.33GHz on one core, and cost $332 in batches of...]]></description>
<guid>http://www.electronista.com/articles/09/12/01/intel.set.to.show.3.mobile.core.ix.chips.in.jan/</guid>
<pubDate>Tue, 01 Dec 2009 16:00:00 GMT</pubDate>
</item>
<item>
<title>Tilera 100-core CPU said 4X faster than new Xeons</title>
<link>http://www.electronista.com/articles/09/10/26/tilera.tile.gx100.may.beat.intel/</link>
<description>&#60;img align='left' src='http://photos.macnn.com/news/0910/tileratile-gx100.jpg' border='0' width='176' height='120' /><![CDATA[Tilera on Monday unveiled a new processor it hopes will unseat Intel from its overall lead in performance.  The TILE-Gx100 counts on a massively parallel, 100-core architecture to handle many tasks at once and reportedly overcomes some of the problems of scaling inherent to many-core designs.  Instead of using a data bus, the grid is treated as a mesh network with switches on each core to route da...]]></description>
<guid>http://www.electronista.com/articles/09/10/26/tilera.tile.gx100.may.beat.intel/</guid>
<pubDate>Mon, 26 Oct 2009 21:10:00 GMT</pubDate>
</item>
</channel>
</rss>
