Intel Xeon E7 packs 10 cores
Intel on Tuesday brought out the Sandy Bridge-based version of its highest-performing Xeons. The Xeon E7 series is the practical version of the Westmere-EX architecture and is intended for both servers as well as other very high performance computers. It represents one of the few if not first Intel chips to break the eight-core barrier and, at 10 real cores, can handle as many as 20 simultaneous code threads at once through Hyperthreading.
Intel Westmere-EX may scale back ambitions
Intel might scale back its plans for Xeon processors using its Westmere-EX architecture, a rumor may have confirmed today. Originally thought to have as many as 12 cores, a source now says it would peak at 10. What caused this wasn't mentioned by the PCWorld contact, but heat, power and size requirements are often what set back chip releases.
Intel Westmere-EX to replace Nehalem in large PCs
Intel is planning a server-oriented version of its 32 nanometer Xeons that would be the company's first chip of any kind with more than eight cores, Intel said in a webcast late Thursday. Currently codenamed Westmere-EX, it would supplant the eight-core, 45nm Xeon 7500 and is likely to pack 12 cores without increasing the power consumption over the current chip. It should still work in existing processor sockets and would be a drop-in replacement for those who want to upgrade servers rather than replace them outright.
Intel Nehalem-EX due for servers
Intel in an update late Thursday said its next-generation Xeon processors should still launch later this month. The eight-core Nehalem-EX processors don't have official clock speeds but will include 24MB of cache shared between each of the individual cores and will support Hyperthreading. A server with four Xeons could as a result support as many as 64 separate program threads at once, Xeon platform lead Shannon Poulin said.
Huron River to replace Calpella next year
Early details have surfaced of the timetable and features of Intel's replacement for Calpella, the chipset that drives mobile Core i3, i5 and i7 processors. Already known under its Huron River codename, the new platform is now expected in early 2011. It will still be built on a 32 nanometer process but will recognize processors built on the Sandy Bridge architecture, which should have both much faster integrated graphics, support for 1,600MHz DDR3 memory and unspecified higher clock speeds.
Intel to expand Nehalem at CES 2010
Intel this afternoon revealed that it has already started shipping the processors it plans to unveil at CES. Highlighted in the pack are its mobile Core i3 and i5 processors: the first notebook chips based on its year-old Nehalem architecture, the dual-core parts are not only faster than the outgoing Core 2 Duo at a given clock speed but are also the first Intel chips of any kind to integrate the graphics into the main processor. The single change improves both performance, by speeding up communication with the CPU, as well as battery life.
Core i7-980X hints at 6-core Xeon too
Intel's first mainstream six-core processor should be fast across the board, a leak late Monday has given away. Built on the 32 nanometer Westmere process and part of the Gulftown architecture, the Core i7-980X will keep the Core i7 badge despite its two extra cores. At the same time, it will also maintain a high clock speed and should run at 3.33GHz, or the same speed as the current quad-core leader.
Intel showing 32nm chips early
Intel has signaled its plans to detail the first processors based on its 32 nanometer Westmere technology on Thursday. The semiconductor firm is expected to center its attention on the first dual-core notebook chips based on both the 32nm process and Nehalem and should introduce the mobile Core i5 and i3 as part of the introduction. These will be the first to carry graphics on the processor die and, on i5 models, will support Turbo Boost to automatically overclock one core when the other is shut down.
Intel set to show 3 mobile Core iX chips in Jan
A leak today reveals that at least three of Intel's mobile Core i5 and i7 parts should be available come the start of next year at moderate prices. The company plans to head up the line with the 2.66GHz Core i7-620M, which will support Hyperthreading to perform the work of four cores. It should carry 4MB of Level 2 cache, support Turbo Boost up to 3.33GHz on one core, and cost $332 in batches of $1,000.
Tilera TILE-Gx100 may beat Intel
Tilera on Monday unveiled a new processor it hopes will unseat Intel from its overall lead in performance. The TILE-Gx100 counts on a massively parallel, 100-core architecture to handle many tasks at once and reportedly overcomes some of the problems of scaling inherent to many-core designs. Instead of using a data bus, the grid is treated as a mesh network with switches on each core to route data smoothly. The approach lets Tilera reach the core count without it stalling or without the added space dictated by the bus architecture.
Apple may get early use of Gulftown Xeon
Apple may have a temporary exclusive on Intel's fastest workstation Xeons early next year, a purported leak argues tonight. An unnamed source says Apple is readying a Mac Pro based on the Xeon version of Intel's Gulftown six-core architecture and that the Mac builder would have a short exclusive for the processors, launching its own workstations in the winter while everyone else would have to wait until the spring. What configurations would ship aren't known by the MacBidouille tipster.
Intel Maloney keynote leaked
A prematurely released copy of Intel's plans for a Wednesday keynote has surfaced a day in advance and has provided details of the company's plans for the near future. The release obtained by ZDNet has Intel executive VP Sean Maloney revealing that the company has started shipping its many-cored Larrabee graphics chip to developers ahead of a full release and demonstrating what it can do in real-time. The demo should show a custom build of the online shooter Enemy Territory: Quake Wars running with raytraced lighting, a feat which is technically difficult for any graphics hardware as it calculates the path of each ray of light rather than making "shortcut" calculations.
Intel 32nm and Jasper Forest enroute
Intel on Monday headed up its Developer Forum with word that it has started manufacturing its first processors based on a 32 nanometer (nm) process. The shrink from 45nm, nicknamed Westmere, should improve performance by increasing the density of the processors by about 30 percent while reducing the amount of power used; the gesture lets Intel boost clock speeds without drawing extra battery life or generating more heat.
Apple and MCP89 MCP99
Apple will not only move on to a newer NVIDIA platform for its notebooks but may include a second chipset, insiders claimed on Friday. Those purportedly within the notebook business tell DigiTimes that Macs will use MCP89, the successor to the existing GeForce 9400M (MCP79), but also that the company will use MCP99, a largely unknown second part. Other sources posting today suggest that MCP89 will be used for Core 2 mobile processors while MCP99 would be targeted at Nehalem-based Core i5/i7 processors and their eventual 32 nanometer successors under the future Westmere architecture.
Sandy Bridge in Q4 2010
Intel has scheduled the release of its 32nm Sandy Bridge processors for the fourth quarter of 2010, according to DigiTimes. The architecture will succeed Nehalem and its condensed 32nm version, Westmere, the latter of which is set to be released in the fourth quarter of 2009. Sandy Bridge supports 4GHz clock speeds, with scalable CPUs using up to eight cores. The architecture also houses CPUs and GPUs on one die, unlike the two-die approach taken with Nehalem.
Intel Westmere Spotted
Intel's six-core Xeon processor, known as Westmere, has been seen in a leak of an engineering sample today [caution: may not be safe for work). Still identified as a mainstream Core i7 chip by software, the Xeon W5590 example runs at a relatively low 2.4GHz clock speed but has 12MB of Level 3 cache shared between all cores and 256KB of Level 2 cache for each core. With Hyperthreading, which runs up to two program threads on a single core, the system shows as many as 12 effective cores.
Intel Westmere Details
Intel at the International Solid-State Circuits Conference today provided some of the first concrete details of Westmere, the codename for its 32 nanometer processor family. The design is primarily a smaller, more efficient adaptation of the Nehalem architecture in the Core i7 but, in the dual-core desktop (Clarkdale) and notebook (Arrandale) offerings, will include both a two-channel DDR3 memory interface and an integrated but switchable graphics core. Like NVIDIA's Hybrid SLI mode or AMD's Hybrid CrossFire, the technology will let systems with dedicated graphics chipsets revert to Intel's own core in low-demand situations or when on battery.
Intel $7B plant investment
Intel President and CEO Paul Otellini on Tuesday announced the chipmaker will make its biggest ever investment for a manufacturing process for its 32 nanometer chips. The plan is to spend $7 billion on retrofitting existing production plants to build the new chips in the US over the next two years. The manufacturing plants due for the upgrade are based in Oregon, Arizona and New Mexico and will create about 7,000 jobs across the three states.
Intel 2009-1010 Leaked Map
Intel's upcoming processor generations will double the number of cores per chip and add a brand new language for specialized code, according to leaked slides obtained by CanardPlus. Although the semiconductor company's Core i7 will just receive a manufacturing process shrink down from 45 nanometers to 32 during 2009, reducing its power use and allowing more complex parts, a replacement architecture codenamed Sandy Bridge will replace it by 2010 and double the number of cores per die to eight. Hyperthreading support will let it handle as many as 16 code threads at once, while a large 16MB pool of Level 3 cache will be shared to make best use of the cores.